Track 5 · Planned · Tentative Q2 2027
Defensive Engineering & Crash Forensics
Supervision, fault containment and post-mortem analysis: watchdogs, brownout, the MPU, HardFault handlers and reading a dead unit's RAM.
Track 5 isn’t on sale yet. It opens for pre-order when writing starts, with release planned for Q2 2027.
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Why each module matters
- 5.1Hardware Supervision: Internal vs. External Windowed WatchdogsBuild a watchdog design that can still reset a frozen device even when interrupts keep running.
- 5.2The Dying Gasp: Power-Good, Brownout & Emergency State PersistenceDetect power loss early and save critical state before the rail collapses, to protect parameters and data.
- 5.3Memory Protection Units (MPU) & Fault ContainmentTurn wild pointers and stack overflows into immediate faults at the instruction that caused them.
- 5.4Custom HardFault Handlers & Crashdump RecordersReplace the silent infinite loop with a crash record that points to the instruction that failed.
- 5.5Production Forensics: RAM Dumping & MAP-File ReconstructionAnalyse a unit returned from the field with the debug port fused off, using only a RAM dump and the map file.
- 5.6The Production Diagnostics Paradox (Selective Debugging)Keep deep diagnostics available on production units, behind authentication, without shipping a separate debug build.
The cost of a single failure
- The failure it addresses
- Flash configuration corrupted by a power cut, watchdog deadlocks, and sealed field returns nobody can diagnose.
- Typical cost if it happens
- $40,000+ in warranty replacements (for example 500 bricked units at $80 each), or inventory written off as unreproducible.
- What the track teaches
- Teaches dying-gasp state saving on PGOOD, windowed watchdogs and decoding raw RAM dumps against the .map file.
Cost benchmarks and engineering labour estimates are drawn from typical industry averages (fully loaded engineering rates of $80–$100 an hour, typical prototype fabrication costs, and low-to-mid volume manufacturing runs). They are provided for risk assessment, educational planning and internal budgeting only. No specific financial return, operational saving or outcome is guaranteed. All tracks
Release emails for Track 5
One email each time a module in this track ships.
Track 5 / Module 5.1
Hardware Supervision: Internal vs. External Windowed Watchdogs
Why a watchdog kicked from a timer ISR keeps a frozen device alive, windowed watchdogs, and multi-task liveness checks.
- Status
- Planned
- Track release
- Q2 2027 (tentative)
- Included in
- Track 5
Path
The step-by-step path for this module is published before it’s released.
Every module includesHandbook (PDF)
Some modules also ship extra files, such as code or register maps.
Track 5 isn’t on sale yet. It opens for pre-order when writing starts, with release planned for Q2 2027.
Track 5 / Module 5.2
The Dying Gasp: Power-Good, Brownout & Emergency State Persistence
PGOOD versus BOR/PVD, sizing hold-up capacitance, and the shutdown ISR that saves state before the rail collapses.
- Status
- Planned
- Track release
- Q2 2027 (tentative)
- Included in
- Track 5
Path
The step-by-step path for this module is published before it’s released.
Every module includesHandbook (PDF)
Some modules also ship extra files, such as code or register maps.
Track 5 isn’t on sale yet. It opens for pre-order when writing starts, with release planned for Q2 2027.
Track 5 / Module 5.3
Memory Protection Units (MPU) & Fault Containment
MPU regions without an RTOS, trapping null pointers at 0x00000000, no-execute RAM and stack guard regions.
- Status
- Planned
- Track release
- Q2 2027 (tentative)
- Included in
- Track 5
Path
The step-by-step path for this module is published before it’s released.
Every module includesHandbook (PDF)
Some modules also ship extra files, such as code or register maps.
Track 5 isn’t on sale yet. It opens for pre-order when writing starts, with release planned for Q2 2027.
Track 5 / Module 5.4
Custom HardFault Handlers & Crashdump Recorders
Extracting the stacked PC, LR and xPSR, decoding CFSR, HFSR, MMFAR and BFAR, and saving a crash record that survives reset.
- Status
- Planned
- Track release
- Q2 2027 (tentative)
- Included in
- Track 5
Path
The step-by-step path for this module is published before it’s released.
Every module includesHandbook (PDF)
Some modules also ship extra files, such as code or register maps.
Track 5 isn’t on sale yet. It opens for pre-order when writing starts, with release planned for Q2 2027.
Track 5 / Module 5.5
Production Forensics: RAM Dumping & MAP-File Reconstruction
Pulling SRAM over a bootloader or UART when SWD is fused off, then rebuilding variables, TCBs and call stacks from the .map and .elf.
- Status
- Planned
- Track release
- Q2 2027 (tentative)
- Included in
- Track 5
Path
The step-by-step path for this module is published before it’s released.
Every module includesHandbook (PDF)
Some modules also ship extra files, such as code or register maps.
Track 5 isn’t on sale yet. It opens for pre-order when writing starts, with release planned for Q2 2027.
Track 5 / Module 5.6
The Production Diagnostics Paradox (Selective Debugging)
Dormant diagnostics in production builds, challenge-response unlock over CAN, UART or USB, and black-box logs triggered by faults.
- Status
- Planned
- Track release
- Q2 2027 (tentative)
- Included in
- Track 5
Path
The step-by-step path for this module is published before it’s released.
Every module includesHandbook (PDF)
Some modules also ship extra files, such as code or register maps.
Track 5 isn’t on sale yet. It opens for pre-order when writing starts, with release planned for Q2 2027.